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AD5263BRU50-REEL7 Datasheet(PDF) 5 Page - Analog Devices |
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AD5263BRU50-REEL7 Datasheet(HTML) 5 Page - Analog Devices |
5 / 6 page PRELIMINARY TECHNICAL DATA Quad +15V Digital Potentiometers AD5263 08 AUG ’02, REV PrD - 5 - SPI Compatible Digital Interface (DIS=’0’) TABLE IA: SPI 10-Bit Serial-Data Word Format ADDR DATA B9 B8 B7 B6 B5 B4 B3 B2 B1 B0 A1 A0 D7 D6 D5 D4 D3 D2 D1 D0 MSB LSB 29 27 20 A1 A0 D7 D6 D5 D4 D3 D1 D0 S DI CLK CS VOUT 0 1 0 1 0 1 0 1 D2 RDAC REGISTER LOAD Figure 1A. SPI Timing Diagram 1 0 1 0 1 0 VDD 0V SDI (Data In) CLK CS VOUT ±1 LSB ERROR BAND ±1 LSB tS tCSH1 tCSS tCL tCH tDS tDH Ax or Dx tCSH0 tCSW tCS1 Ax or Dx tPD_MAX 1 0 SDO (Data Out) A'x or D'x A'x or D'x Figure 1B. Detail SPI Timing Diagram I 2C Compatible Digital Interface (DIS=’1’) TABLE IIA: I 2C Write Mode Data Word Format S 0 1 0 1 1 A D 1 A D 0 W W W W A X A 1 A 0 R S S D O 1 O 2 X A D 7 D 6 D 5 D 4 D 3 D 2 D 1 D 0 A P Slave Address Byte Instruction Byte Data Byte TABLE IIB: I 2C Read Mode Data Word Format: S 0 1 0 1 1 0 A D 0 R A D 7 D 8 D 5 D 4 D 3 D 2 D 1 D 0 A P Slave Address Byte Data Byte S = Start Condition P = Stop Condition A = Acknowledge AD1, AD0 = Package pin programmable address bits, Must match with the logic states at pins AD1, AD0 A1, A0 = RDAC sub address select RS = Software Reset wiper (A1, A0) to mid scale position SD = Shutdown active high, ties wiper (A1, A0) to terminal A, opens terminal B, RDAC register contents are not disturbed. To exit shutdown a command SD = ‘0’ must be executed for each RDAC (A1, A0). W W W W = Write = ‘0’ R = Read = ‘1’ D7,D6,D5,D4,D3,D2,D1,D0 = Data Bits X = Don’t Care t 4 SDA SCL PS Sr P t 1 t 2 t 3 t 5 t 6 t 7 t 8 t 8 t 9 t 10 Figure 2. I 2C Compatible Detail Timing Diagram |
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