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PC7410MGSU450L Datasheet(PDF) 9 Page - ATMEL Corporation |
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PC7410MGSU450L Datasheet(HTML) 9 Page - ATMEL Corporation |
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9 / 54 page  9 PC7410 2141D–HIREL–02/04 Detailed Specification Scope This drawing describes the specific requirements for the microprocessor PC7410 in compliance with Atmel-Grenoble standard screening. Applicable Documents 1. MIL-STD-883: Test methods and procedures for electronics 2. MIL-PRF-38535: Appendix A: General specifications for microcircuits Requirements General The microcircuits are in accordance with the applicable documents and as specified herein. Design and Construction Terminal Connections Depending on the package, the terminal connections are as shown in Table 16, Table 4 and Figure 2. Absolute Maximum Ratings Notes: 1. Functional and tested operating conditions are given in Table 4. Absolute maximum ratings are stress ratings only. Stresses beyond those listed may affect device reliability or cause permanent damage to the device. 2. Caution: V IN must not exceed OVDD or L2OVDD by more than 0.2V at any time including during power-on reset. 3. Caution: L2OV DD/OVDD must not exceed VDD/AVDD/L2AVDD by more than 2.0V at any time including during power-on reset; this limit may be exceeded for a maximum of 20 ms during power-on reset and power-down sequences. 4. Caution: V DD/AVDD/L2AVDD must not exceed L2OVDD/OVDD by more than 0.4V at any time including during power-on reset; this limit may be exceeded for a maximum of 20 ms during power-on reset and power-down sequences. 5. VIN may overshoot/undershoot to a voltage and for a maximum duration as shown in Figure 3. 6. PC7410RXnnnLE (Rev 1.4) and later only. Previous revisions do not support 3.3V OV DD and have a maximum value OVDD of -0.3 to 2.6V. Table 2. Absolute Maximum Ratings (1) Symbol Characteristic Value Unit V DD Core supply voltage -0.3 to 2.1(4) V AVDD PLL supply voltage -0.3 to 2.1(4) V L2AV DD L2 DLL supply voltage -0.3 to 2.1(4) V OV DD 60x bus supply voltage -0.3 to 3.465(3)(6) V L2OVDD L2 bus supply voltage -0.3 to 2.6(3) V V IN Processor bus input voltage -0.3 to OVDD + 0,2V(2)(5) V V IN L2 bus input voltage -0.3 to L2OVDD + 0,2V(2)(5) V VIN JTAG signal input voltage -0.3 to OVDD + 0,2V V T STG Storage temperature range -55 to 150 °C Rework temperature 260 °C |
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