P89V51RC2 datasheet(7/77 Pages) PHILIPS

Part #	P89V51RC2

Description	8-bit 80C51 5 V low power 16/32/64 kB Flash microcontroller with 1 kB RAM

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Manufacturer	PHILIPS [NXP Semiconductors]

Direct Link	http://www.nxp.com

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Philips Semiconductors

P89V51RB2/RC2/RD2

8-bit microcontrollers with 80C51 core

Product data

Rev. 03 — 02 December 2004

7 of 77

9397 750 14341

5.2 Pin description

Table 3:

P89V51RB2/RC2/RD2 pin description

Symbol

Type

Description

DIP40

TQFP44

PLCC44

P0.0 to

P0.7

39-32

37-30

43-36

I/O

Port 0: Port 0 is an 8-bit open drain bi-directional I/O

port. Port 0 pins that have ‘1’s written to them ﬂoat, and

in this state can be used as high-impedance inputs.

Port 0 is also the multiplexed low-order address and

data bus during accesses to external code and data

memory. In this application, it uses strong internal

pull-ups when transitioning to ‘1’s. Port 0 also receives

the code bytes during the external host mode

programming, and outputs the code bytes during the

external host mode veriﬁcation. External pull-ups are

required during program veriﬁcation or as a general

purpose I/O port.

P1.0 to

P1.7

1-8

40-44, 1-3

2-9

I/O with

internal pull-up

Port 1: Port 1 is an 8-bit bi-directional I/O port with

internal pull-ups. The Port 1 pins are pulled high by the

internal pull-ups when ‘1’s are written to them and can

be used as inputs in this state. As inputs, Port 1 pins that

are externally pulled LOW will source current (IIL)

because of the internal pull-ups. P1.5, P1.6, P1.7 have

high current drive of 16 mA. Port 1 also receives the

low-order address bytes during the external host mode

programming and veriﬁcation.

P1.0

1

40

2

I/O

T2: External count input to Timer/Counter 2 or Clock-out

from Timer/Counter 2

P1.1

2

41

3

I

T2EX: Timer/Counter 2 capture/reload trigger and

direction control

P1.2

3

42

4

I

ECI: External clock input. This signal is the external

clock input for the PCA.

P1.3

4

43

5

I/O

CEX0: Capture/compare external I/O for PCA Module 0.

Each capture/compare module connects to a Port 1 pin

for external I/O. When not used by the PCA, this pin can

handle standard I/O.

P1.4

5

44

6

I/O

SS: Slave port select input for SPI

CEX1: Capture/compare external I/O for PCA Module 1

P1.5

6

1

7

I/O

MOSI: Master Output Slave Input for SPI

CEX2: Capture/compare external I/O for PCA Module 2

P1.6

7

2

8

I/O

MISO: Master Input Slave Output for SPI

CEX3: Capture/compare external I/O for PCA Module 3

P1.7

8

3

9

I/O

SCK: Master Output Slave Input for SPI

CEX4: Capture/compare external I/O for PCA Module 4

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