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MC100EP16TDR2 Datasheet(PDF) 2 Page - ON Semiconductor |
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MC100EP16TDR2 Datasheet(HTML) 2 Page - ON Semiconductor |
2 / 8 page MC10EP16T, MC100EP16T http://onsemi.com 2 1 2 3 45 6 7 8 Q VEE VCC Figure 1. 8–Lead Pinout (Top View) and Logic Diagram D Q D VT VT D, D ECL Data Inputs Q, Q ECL Data Outputs VCC Positive Supply VEE Negative Supply VT 50 W Termination Resistor to D VT 50 W Termination Resistor to D PIN DESCRIPTION 50 W 50 W PIN FUNCTION ATTRIBUTES Characteristics Value Internal Input Pulldown Resistor N/A Internal Input Pullup Resistor N/A ESD Protection Human Body Model Machine Model Charged Device Model > 4 kV > 200 V > 2 kV Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1) Level 1 Flammability Rating Oxygen Index: 28 to 34 UL–94 V–0 @ 0.125 in Transistor Count 167 Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test 1. For additional information, see Application Note AND8003/D. MAXIMUM RATINGS (Note 2) Symbol Parameter Condition 1 Condition 2 Rating Units VCC PECL Mode Power Supply VEE = 0 V 6 V VEE NECL Mode Power Supply VCC = 0 V –6 V VI PECL Mode Input Voltage VEE = 0 V VI VCC 6 V VI PECL Mode In ut Voltage NECL Mode Input Voltage VEE 0 V VCC = 0 V VI VCC VI VEE 6 –6 V V Iout Output Current Continuous Surge 50 100 mA mA IBB VBB Sink/Source ± 0.5 mA TA Operating Temperature Range –40 to +85 °C Tstg Storage Temperature Range –65 to +150 °C θJA Thermal Resistance (Junction–to–Ambient) 0 LFPM 500 LFPM 8 SOIC 8 SOIC 190 130 °C/W °C/W θJC Thermal Resistance (Junction–to–Case) std bd 8 SOIC 41 to 44 °C/W θJA Thermal Resistance (Junction–to–Ambient) 0 LFPM 500 LFPM 8 TSSOP 8 TSSOP 185 140 °C/W °C/W θJC Thermal Resistance (Junction–to–Case) std bd 8 TSSOP 41 to 44 °C/W Tsol Wave Solder <2 to 3 sec @ 248 °C 265 °C 2. Maximum Ratings are those values beyond which device damage may occur. |
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