14-Bit ADCs, 150ksps, 3.3V Single Supply

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5

TIMING CHARACTERISTICS (Figures 5 and 6) (continued)

Note 2: Relative accuracy is the deviation of the analog value at any code from its theoretical value after the gain error and offset

error have been nullified.

Note 3: Offset nullified.

Note 4: Conversion time is defined as the number of clock cycles multiplied by the clock period; clock has 50% duty cycle. Includes

the acquisition time.

Note 5: Acquisition time is 5 clock cycles in short acquisition mode and 13 clock cycles in long acquisition mode.

Note 7: When an external reference has a different voltage than the specified typical value, the full scale of the ADC scales propor-

tionally.

Note 8: Defined as the change in positive full scale caused by a ±5% variation in the nominal supply voltage.

Typical Operating Characteristics

INTEGRAL NONLINEARITY

vs. DIGITAL OUTPUT CODE

DIGITAL OUTPUT CODE

13649

11943

8531

10237

3413

5119

6825

1707

-0.8

-0.6

-0.4

-0.2

0

0.2

0.4

0.6

0.8

1.0

-1.0

1

15355

DIFFERENTIAL NONLINEARITY

vs. DIGITAL OUTPUT CODE

DIGITAL OUTPUT CODE

13649

11943

8531

10237

3413

5119

6825

1707

-0.8

-0.6

-0.4

-0.2

0

0.2

0.4

0.6

0.8

1.0

-1.0

1

15355

TOTAL SUPPLY CURRENT

vs. TEMPERATURE

TEMPERATURE (

°C)

80

60

20

40

0

-20

8.1

8.2

8.3

8.4

8.5

8.6

8.7

8.8

8.9

9.0

8.0

-40

C

B

A