MX29LV320TTI-12G datasheet(2/63 Pages) MCNIX

Part #	MX29LV320TTI-12G

Description	32 BIT 4M X 8 / 2M X 16 ] SINGLE VOLTAGE 3V ONLY FLASH MEMORY

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Manufacturer	MCNIX [Macronix International]

Direct Link	http://www.macronix.com

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P/N:PM0742

REV. 1.4, JUL. 04, 2003

MX29LV320T/B

AUTOMATIC PROGRAMMING

The MX29LV320T/B is byte/word programmable using

the Automatic Programming algorithm. The Automatic

Programming algorithm makes the external system do

not need to have time out sequence nor to verify the

data programmed. The typical chip programming time at

room temperature of the MX29LV320T/B is less than 36

seconds.

AUTOMATIC PROGRAMMING ALGORITHM

MXIC's Automatic Programming algorithm require the user

to only write program set-up commands (including 2 un-

lock write cycle and A0H) and a program command (pro-

gram data and address). The device automatically times

the programming pulse width, provides the program veri-

fication, and counts the number of sequences. A status

bit similar to DATA polling and a status bit toggling be-

tween consecutive read cycles, provide feedback to the

user as to the status of the programming operation.

AUTOMATIC CHIP ERASE

The entire chip is bulk erased using 50 ms erase pulses

according to MXIC's Automatic Chip Erase algorithm.

Typical erasure at room temperature is accomplished in

less than 50 seconds. The Automatic Erase algorithm

automatically programs the entire array prior to electri-

cal erase. The timing and verification of electrical erase

are controlled internally within the device.

AUTOMATIC SECTOR ERASE

The

MX29LV320T/B

is sector(s) erasable using

MXIC's Auto Sector Erase algorithm. Sector erase

modes allow sectors of the array to be erased in one

erase cycle. The Automatic Sector Erase algorithm

automatically programs the specified sector(s) prior to

electrical erase.

The timing and verification of

electrical erase are controlled internally within the

device.

AUTOMATIC ERASE ALGORITHM

MXIC's Automatic Erase algorithm requires the user to

write commands to the command register using stand-

ard microprocessor write timings. The device will auto-

matically pre-program and verify the entire array. Then

the device automatically times the erase pulse width,

provides the erase verification, and counts the number

of sequences. A status bit toggling between consecu-

tive read cycles provides feedback to the user as to the

status of the programming operation.

Register contents serve as inputs to an internal state-

machine which controls the erase and programming cir-

cuitry. During write cycles, the command register inter-

nally latches address and data needed for the program-

ming and erase operations. During a system write cycle,

addresses are latched on the falling edge, and data are

latched on the rising edge of WE .

MXIC's Flash technology combines years of EPROM

experience to produce the highest levels of quality, relia-

bility, and cost effectiveness. The MX29LV320T/B elec-

trically erases all bits simultaneously using Fowler-Nord-

heim tunneling. The bytes/words are programmed by

using the EPROM programming mechanism of hot elec-

tron injection.

During a program cycle, the state-machine will control

the program sequences and command register will not

respond to any command set. During a Sector Erase

cycle, the command register will only respond to Erase

Suspend command. After Erase Suspend is completed,

the device stays in read mode. After the state machine

has completed its task, it will allow the command regis-

ter to respond to its full command set.

The MX29LV320T/B uses a 2.7V to 3.6V VCC

supply to perform the High Reliability Erase and

auto Program/Erase algorithms.

The highest degree of latch-up protection is

achieved with MXIC's proprietary non-epi process.

Latch-up protection is proved for stresses up to 100

milliamperes on address and data pin from -1V to

VCC + 1V.

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MX29LV320TTI-12G Datasheet(PDF) 2 Page - Macronix International

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