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IDT71V416VS10YGI Datasheet(PDF) 1 Page - Integrated Device Technology |
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IDT71V416VS10YGI Datasheet(HTML) 1 Page - Integrated Device Technology |
1 / 9 page SEPTEMBER 2004 DSC-6478/00 1 ©2004 Integrated Device Technology, Inc. Features ◆ ◆ ◆ ◆ ◆ 256K x 16 advanced high-speed CMOS Static RAM ◆ ◆ ◆ ◆ ◆ JEDEC Center Power / GND pinout for reduced noise. ◆ ◆ ◆ ◆ ◆ Equal access and cycle times – Commercial and Industrial: 10/12/15ns ◆ ◆ ◆ ◆ ◆ One Chip Select plus one Output Enable pin ◆ ◆ ◆ ◆ ◆ Bidirectional data inputs and outputs directly LVTTL-compatible ◆ ◆ ◆ ◆ ◆ Low power consumption via chip deselect ◆ ◆ ◆ ◆ ◆ Upper and Lower Byte Enable Pins ◆ ◆ ◆ ◆ ◆ Single 3.3V power supply ◆ ◆ ◆ ◆ ◆ Available in 44-pin, 400 mil plastic SOJ package and a 44- pin, 400 mil TSOP Type II package and a 48 ball grid array, 9mm x 9mm package. Description The IDT71V416 is a 4,194,304-bit high-speed Static RAM organized as256Kx16.ItisfabricatedusingIDT’shigh-perfomance,high-reliability CMOStechnology.Thisstate-of-the-arttechnology,combinedwithinno- vativecircuitdesigntechniques,providesacost-effectivesolutionforhigh- speed memory needs. The IDT71V416 has an output enable pin which operates as fast as 5ns,withaddressaccesstimesasfastas10ns.Allbidirectionalinputsand outputs of the IDT71V416 are LVTTL-compatible and operation is from a single 3.3V supply. Fully static asynchronous circuitry is used, requiring no clocks or refresh for operation. The IDT71V416 is packaged in a 44-pin, 400 mil Plastic SOJ and a 44-pin, 400 mil TSOP Type II package and a 48 ball grid array, 9mm x 9mmpackage. Functional Block Diagram Output Enable Buffer Address Buffers Chip Select Buffer Write Enable Buffer Byte Enable Buffers OE A0 - A17 Row / Column Decoders CS WE BHE BLE 4,194,304-bit Memory Array Sense Amps and Write Drivers 16 High Byte Output Buffer High Byte Write Buffer Low Byte Write Buffer Low Byte Output Buffer 8 8 8 8 8 8 8 8 I/O 15 I/O 8 I/O 7 I/O 0 6478 drw 01 3.3V CMOS Static RAM 4 Meg (256K x 16-Bit) IDT71V416VS IDT71V416VL |
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