© 2005 California Micro Devices Corp. All rights reserved.

4

430 N. McCarthy Blvd., Milpitas, CA 95035-5112

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Tel: 408.263.3214

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Fax: 408.263.7846

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www.calmicro.com

02/28/05

CMCPCI102B

Specifications (Cont’d)

Note 1: Operating Characteristics are over Standard Operating Conditions unless otherwise specified.

Note 2: This parameter is guaranteed by design; it is not tested 100%.

SYMBOL PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

510

15

Ω

1M

Ω

9.5

18

k

Ω

Resistance Tolerance

+5%

Temperature Coefficient of

-100

ppm/°C

Capacitance on backplane side

Measured @ 66MHz,

0VDC, SW_EN=0V; Note 2

1.9

pF

Capacitance on device side (B

Measured @ 66MHz,

0VDC, VIO=5V, 5_EN=5V

SW_EN=0V; Note 2

4.2

pF

Logic Low Input Voltage to P_EN,

3_EN, 5_EN, SW_EN

-0.5

[VIO] x 0.3

V

Logic High Input Voltage to P_EN,

3_EN, 5_EN, SW_EN

[VIO] x 0.7

[VIO] + 0.5

V

Leakage Current into P_EN, 3_EN,

5_EN, SW_EN

GND < V < VIO

+1+10

µA

Supply Current for internal circuits

(measured at GND pin)

0.25

1

mA

low-to-high transition of SW_EN

Note 2, ’CAP’ pin capaci-

tor=0.01

µF

14

ms

low transition of SW_EN

Note 2, ’CAP’ pin capaci-

tor=0.01

µF

12

µs

Propagation delay for pull-up

Note 2

10

ns