© 2005 California Micro Devices Corp. All rights reserved.

2

430 N. McCarthy Blvd., Milpitas, CA 95035-5112

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Tel: 408.263.3214

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Fax: 408.263.7846

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www.calmicro.com

02/28/05

CMCPCI102B

PIN DESCRIPTIONS

PIN(S)

NAME

DESCRIPTION

1-5

A1 - A5

The backplane-side input signals for channels 1 through 5, respectively.

10-14

A6 - A10

The backplane-side input signals for channels 6 through 10, respectively.

24-28

B1 - B5

The device-side connection for channels 1 through 5, respectively.

15-19

B6 - B10

The device-side connection for channels 6 through 10, respectively.

6

1V

A precharge supply voltage input for all channels. This voltage can be less than or equal to VIO.

7

P_EN

The precharge enable input which controls the precharge pull-up resistors. When this active high

control signal is set to ’1’, the precharge of all channels is enabled.

8

GND

The ground voltage reference for the CMCPCI102BT/BR.

9

CAP

A capacitor must be placed from this pin to GND. The recommended value is 0.01

µF,16V.

20

SW_EN

The series switch enable input. When this active high control signal is set to ’1’, the series switch

between the channel’s backplane-side terminal and device-side terminal is closed. When this sig-

nal is cleared to ’0’, the switch is open.

21

3_EN

The enable signal for the device-side channel pull-up mechanism when 3.3V is the supply volt-

age. When this active high control signal is set to ’1’, the 2.7k

Ω pull-up resistor which pulls up the

channel to the supply rail is engaged. Otherwise, this pin should be set to ’0’.

22

5_EN

The enable signal for the device-side channel pull-up mechanism when 5V is the supply voltage.

When this active high control signal is set to ’1’, the 1k

Ωpull-up resistor which pulls up the channel

to the supply rail is engaged. Otherwise, this pin should be set to ’0’.

23

VIO

The positive supply voltage for the CMCPCI102BT/BR. Either 3.3V or 5V may be used.

28-pin TSSOP

1

2

3

4

5

6

7

8

20

19

18

17

21

22

9

10

24

23

25

26

11

12

27

28

A5

1V

P_EN

GND

CAP

A6

A7

A8

A1

A2

A3

A4

B2

B3

B4

B5

VIO

5_EN

3_EN

SW_EN

B6

B7

B8

B1

13

14

16

15

B9

B10

A9

A10

PACKAGE / PINOUT DIAGRAM

Note: This drawing is not to scale.

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