PRELIMINARY
CY7C1392AV18
CY7C1393AV18
CY7C1394AV18
Document #: 38-05503 Rev. *A
Page 9 of 21
Maximum Ratings
(Above which the useful life may be impaired.)
Storage Temperature .................................–65°C to +150°C
Ambient Temperature with Power Applied ..–55°C to +125°C
Supply Voltage on VDD Relative to GND........ –0.5V to +2.9V
DC Voltage Applied to Outputs
in High-Z State .................................... –0.5V to VDDQ + 0.5V
DC Input Voltage[9].............................. –0.5V to VDDQ + 0.5V
Current into Outputs (LOW)......................................... 20 mA
Static Discharge Voltage (MIL-STD-883, M 3015)... > 2001V
Latch-up Current.................................................... > 200 mA
Operating Range
Range
Ambient
Temperature
VDD[10]
VDDQ[10]
Com’l
0°C to +70°C
1.8
± 0.1V
1.4V to VDD
Electrical Characteristics Over the Operating Range[11]
DC Electrical Characteristics
Parameter
Description
Test Conditions
Min.
Typ.
Max.
Unit
VDD
Power Supply Voltage
1.7
1.8
1.9
V
VDDQ
I/O Supply Voltage
1.4
1.5
VDD
V
VOH
Output HIGH Voltage
Note 12
VDDQ/2 –
0.12
VDDQ/2 +
0.12
V
VOL
Output LOW Voltage
Note 13
VDDQ/2 –
0.12
VDDQ/2 +
0.12
V
VOH(LOW)
Output HIGH Voltage
IOH = −0.1 mA, Nominal Impedance VDDQ – 0.2
VDDQ
V
VOL(LOW)
Output LOW Voltage
IOL = 0.1 mA, Nominal Impedance
VSS
0.2
V
VIH
Input HIGH Voltage[9]
VREF + 0.1
VDDQ + 0.3
V
VIL
Input LOW Voltage[9, 14]
–0.3
VREF – 0.1
V
VIN
Clock Input Voltage
–0.3
VDDQ + 0.3
V
IX
Input Load Current
GND
≤ VI ≤ VDDQ
–5
5
µA
IOZ
Output Leakage Current
GND
≤ VI ≤ VDDQ, Output Disabled
–5
5
µA
VREF
Input Reference Voltage[15] Typical Value = 0.75V
0.68
0.75
0.95
V
IDD
VDD Operating Supply
VDD= Max.,IOUT= 0 mA,
f = fMAX = 1/tCYC
167 MHz
700
mA
200 MHz
750
mA
250 MHz
800
mA
ISB1
Automatic
Power-down
Current
Max. VDD, Both Ports
Deselected, VIN ≥ VIH or
VIN ≤ VIL,f = fMAX =
1/tCYC, Inputs Static
167 MHz
450
mA
200 MHz
470
mA
250 MHz
490
mA
AC Input Requirements
Parameter
Description
Test Conditions
Min.
Typ.
Max.
Unit
VIH
Input High (Logic 1) Voltage
VREF + 0.2
–
–
V
VIL
Input Low (Logic 0) Voltage
–
–
VREF – 0.2
V
Thermal Resistance[16]
Parameter
Description
Test Conditions
165 FBGA Package
Unit
ΘJA
Thermal Resistance (Junction to Ambient) Test conditions follow standard test
methods and procedures for measuring
thermal impedance, per EIA / JESD51.
16.7
°C/W
ΘJC
Thermal Resistance (Junction to Case)
2.5
°C/W
Notes:
9. Overshoot: VIH(AC) < VDD+0.85V (Pulse width less than tTCYC/2); Undershoot VIL(AC) > –1.5V (Pulse width less than tTCYC/2).
10. Power-up: Assumes a linear ramp from 0V to VDD(Min.) within 200 ms. During this time VIH < VDD and VDDQ < VDD.
11. All voltage referenced to ground.
12. Outputs are impedance controlled. IOH = –(VDDQ/2)/(RQ/5) for values of 175Ω < RQ < 350Ω.
13. Outputs are impedance controlled. IOL=(VDDQ/2)/(RQ/5) for values of 175Ω < RQ < 350Ω.
14. This spec is for all inputs except C and C Clock. For C and C Clock, VIL(Max.) = VREF – 0.2V.
15. VREF (Min.) = 0.68V or 0.46VDDQ, whichever is larger, VREF (Max.) = 0.95V or 0.54VDDQ, whichever is smaller.
16. Tested initially and after any design or process change that may affect these parameters.