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LTC2601CDD Datasheet(PDF) 4 Page - Linear Technology |
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LTC2601CDD Datasheet(HTML) 4 Page - Linear Technology |
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4 / 16 page  4 LTC2601/LTC2611/LTC2621 2601f TI I G CHARACTERISTICS The q denotes specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (See Figure 1) (Note 4) Note 1: Absolute maximum ratings are those values beyond which the life of a device may be impaired. Note 2: Linearity and monotonicity are defined from code kL to code 2N – 1, where N is the resolution and kL is given by kL = 0.016(2N/VREF), rounded to the nearest whole code. For VREF = 4.096V and N = 16, kL = 256 and linearity is defined from code 256 to code 65,535. Note 3: Digital inputs at 0V or VCC. Note 4: Guaranteed by design and not production tested. Note 5: Inferred from measurement at code KL = 0.016(2 N/VREF) and at full scale. Note 6: VCC = 5V, VREF = 4.096V. DAC is stepped 1/4 scale to 3/4 scale and 3/4 scale to 1/4 scale. Load is 2k in parallel with 200pF to GND. Note 7: VCC = 5V, VREF = 4.096V. DAC is stepped ±1LSB between half scale and half scale – 1. Load is 2k in parallel with 200pF to GND. ELECTRICAL C C HARA TERISTICS The q denotes specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. REF = 4.096V (VCC = 5V), REF = 2.048V (VCC = 2.5V), VOUT unloaded, unless otherwise noted. LTC2621 LTC2611 LTC2601 SYMBOL PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX MIN TYP MAX UNITS AC Performance tS Settling Time (Note 6) ±0.024% (±1LSB at 12 Bits) 7 7 7 µs ±0.006% (±1LSB at 14 Bits) 9 9 µs ±0.0015% (±1LSB at 16 Bits) 10 µs Settling Time for 1LSB Step ±0.024% (±1LSB at 12 Bits) 2.7 2.7 2.7 µs (Note 7) ±0.006% (±1LSB at 14 Bits) 4.8 4.8 µs ±0.0015% (±1LSB at 16 Bits) 5.2 µs Voltage Output Slew Rate 0.80 0.80 0.80 V/ µs Capacitive Load Driving 1000 1000 1000 pF Glitch Impulse At Midscale Transition 12 12 12 nV • s Multiplying Bandwidth 180 180 180 kHz en Output Voltage Noise Density At f = 1kHz 120 120 120 nV/ √Hz At f = 10kHz 100 100 100 nV/ √Hz Output Voltage Noise 0.1Hz to 10Hz 15 15 15 µVP-P LTC2601/LTC2611/LTC2621 SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS VCC = 2.5V to 5.5V t1 SDI Valid to SCK Setup q 4ns t2 SDI Valid to SCK Hold q 4ns t3 SCK High Time q 9ns t4 SCK Low Time q 9ns t5 CS/LD Pulse Width q 10 ns t6 LSB SCK High to CS/LD High q 7ns t7 CS/LD Low to SCK High q 7ns t8 SDO Propagation Delay from SCK Falling Edge CLOAD = 10pF VCC = 4.5V to 5.5V q 20 ns VCC = 2.5V to 5.5V q 45 ns t9 CLR Pulse Width q 20 ns t10 CS/LD High to SCK Positive Edge q 7ns t12 LDAC Pulse Width q 15 ns t13 CS/LD High to LDAC High or Low Transition q 200 ns SCK Frequency 50% Duty Cycle q 50 MHz |
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