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GS880Z36AT-150I Datasheet(PDF) 4 Page - GSI Technology |
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GS880Z36AT-150I Datasheet(HTML) 4 Page - GSI Technology |
4 / 25 page Rev: 1.02 9/2002 4/25 © 2001, Giga Semiconductor, Inc. Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com. GS880Z18/36AT-250/225/200/166/150/133 100-Pin TQFP Pin Descriptions Symbol Type Description A0, A1 In Burst Address Inputs; Preload the burst counter A2–A17 In Address Inputs A18 In Address Input (x18 Version Only) CK In Clock Input Signal BA In Byte Write signal for data inputs DQA1–DQA9; active low BB In Byte Write signal for data inputs DQB1–DQB9; active low BC In Byte Write signal for data inputs DQC1–DQC9; active low BD In Byte Write signal for data inputs DQD1–DQD9; active low W In Write Enable; active low E1 In Chip Enable; active low E2 In Chip Enable; Active High. For self decoded depth expansion E3 In Chip Enable; Active Low. For self decoded depth expansion G In Output Enable; active low ADV In Advance/Load; Burst address counter control pin CKE In Clock Input Buffer Enable; active low NC — No Connect DQA1–DQA9 I/O Byte A Data Input and Output pins DQB1–DQB9 I/O Byte B Data Input and Output pins DQC1–DQC9 I/O Byte C Data Input and Output pins DQD1–DQD9 I/O Byte D Data Input and Output pins ZZ In Power down control; active high FT In Pipeline/Flow Through Mode Control; active low LBO In Linear Burst Order; active low VDD In Core power supply VSS In Ground VDDQ In Output driver power supply |
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