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EN29F002AB-70JCP Datasheet(PDF) 2 Page - Eon Silicon Solution Inc. |
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EN29F002AB-70JCP Datasheet(HTML) 2 Page - Eon Silicon Solution Inc. |
2 / 35 page This Data Sheet may be revised by subsequent versions ©2003 Eon Silicon Solution, Inc., www.essi.com.tw or modifications due to changes in technical specifications. 2 EN29F002A / EN29F002AN Rev. A, Issue Date: 2003/03/26 TABLE 1. PIN DESCRIPTION FIGURE 1. LOGIC DIAGRAM Pin Name Function A0-A17 Addresses DQ0-DQ7 Data Input/Outputs CE Chip Enable OE Output Enable WE Write Enable RESET (n/a for EN29F002AN) Hardware Reset Sector Unprotect Vcc Supply Voltage (5V ± 10% ) Vss Ground TABLE 2. BLOCK ARCHITECTURE TOP BOOT BLOCK BOTTOM BOOT BLOCK SECTOR ADDRESSES SIZE (Kbytes) ADDRESSES SIZE (Kbytes) 6 3C000h - 3FFFFh 16 30000h - 3FFFFh 64 5 3A000h - 3BFFFh 8 20000h - 2FFFFh 64 4 38000h - 39FFFh 8 10000h - 1FFFFh 64 3 30000h - 37FFFh 32 08000h - 0FFFFh 32 2 20000h - 2FFFFh 64 06000h - 07FFFh 8 1 10000h - 1FFFFh 64 04000h - 05FFFh 8 0 00000h - 0FFFFh 64 00000h - 03FFFh 16 EN29F002AT/B 8 DQ0 - DQ7 A0 - A17 18 Vcc WE CE OE RESET Vss N/A on EN29F002AN |
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