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A8450KLB Datasheet(PDF) 5 Page - Allegro MicroSystems |
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A8450KLB Datasheet(HTML) 5 Page - Allegro MicroSystems |
5 / 15 page 5 A8450KLB-DS, Rev. 1 Worcester, Massachusetts 01615-0036 (508) 853-5000 115 Northeast Cutoff, Box 15036 www.allegromicro.com Allegro MicroSystems, Inc. A8450 Automotive Multioutput Voltage Regulator VREG VOUTV33 VOUTVADJ VOUTVADJ VENBAT VENBAT VENB VENB VNPOR VNPOR VNPOR VBB VREG VOUTV33 VOUTV5A/V5D VREG Monitor VCP VREG VOUTV33 VOUTVADJ VUVLOV33 tPOR tPOR tPOR tPOR VHYSV33 VUVLOV33 VBB >6V VREG = 1.8 V VUVLOVREG VUVLOVADJ VHYSVADJ AB POR event initiates +7 V Slope of VOUTV33 and VOUTVADJ from A to B determined by ILOAD and output capacitor (C3, C4). ENBAT signals power-on Charge pump ramping Charge pump OK flag set VUVLOV33 exceeded; VADJ enabled VUVLO(33) ENB signals power-off V33 can sustain regulation with normal load by bulk capacitor (COUT) on VREG. Slope of VREG (which controls VOUTV5A/V5D,VOUTV33, and VOUTVADJ) from A to B determined by ILOAD and COUT. A B tPOR tSS Timing Diagrams Figure 1a. NPOR fault due to undervoltage lockout on the V33 or FB pins Figure 1b. Power-off using VBB Figure 1c. Power-on using ENBAT, followed by power-off using ENB |
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