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ACT88320QI-T Datasheet(PDF) 42 Page - Active-Semi, Inc

Part # ACT88320QI-T
Description  Advanced PMU with Inrush Control and Bypass Switch
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Manufacturer  ACTIVE-SEMI [Active-Semi, Inc]
Direct Link  http://www.active-semi.com
Logo ACTIVE-SEMI - Active-Semi, Inc

ACT88320QI-T Datasheet(HTML) 42 Page - Active-Semi, Inc

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ACT88320QI-T
Rev 2.0, 20-Dec-2017
Innovative PowerTM
www.active-semi.com
ActiveSwitcherTM is a trademark of Active-Semi.
Copyright © 2017 Active-Semi, Inc
42
Hardware Configuration
Because the SM2262_M2_S045A does not use the inrush control circuitry, the design connects OVSNS, OVSNS_M,
and OVGATE to ground. The inrush circuitry can be used with the ACT88320QI104 by connecting them per the
datasheet guidelines.
Startup
Buck3
VIN
LDO2
LS
0.5ms
Buck1
CMI 104 Startup
nRESET
20ms
0.5ms
1ms
0.5ms
I2C Address
The ACT88320 7-bit I2C address is 0x25h. Use address 0x4Ah when writing and 0x4Bh when reading.
GPIO1 (pin 13) - nRESET
GPIO1 is configured as an open drain nRESET. nRESET goes open drain 20ms after LDO2 goes into regulation.
GPIO2 (pin 14) – Buck2_VID
GPIO2 is configured as a VID input for Buck2. When Pin 14 = 1, Buck2 = 1.2V. When Pin 14 = 0, Buck2 = 1.8V. This
allows the ACT88320 to put the SM2262 and SM2263 in different power states. Pin 14 can be changed at any time to
change the Buck2 output voltage, but actual usage depends on the application.
GPIO3 (pin 12) – Buck3_VID
GPIO3 is configured as a VID input for Buck3. When Pin 12 = 1, Buck3 = 1.5V. When Pin 12 = 0, Buck2 = 1.35V. This
allows the ACT88320 to put the SM2262 and SM2263 into different power states. Pin 12 can be changed at any time to
change the Buck3 output voltage, but actual application depends on the DDR memory used.
GPIO4 (pin 11) – Buck1_VID
GPIO4 is configured as a VID input for Buck1. When Pin 11 = 1, Buck1 = 0.9V. When Pin 11 = 0, Buck1 = 0.75V. This
allows the ACT88320 to put the SM2262 and SM2263 into different power states. Pin 11 can be changed at any time to
change the Buck1 output voltage, but actual application depends on the DDR memory used.
SLEEP MODE
I2C default settings are SLEEP_MODE=0, SLEEP_EN=0, and SLEEP=0. Refer to the SLEEP State paragraph for details
on how to enter SLEEP Mode.


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