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NM29A080EV Datasheet(PDF) 6 Page - National Semiconductor (TI) |
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NM29A080EV Datasheet(HTML) 6 Page - National Semiconductor (TI) |
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6 / 14 page  Instruction Set The NM29A040080 have 12 instructions which are de- scribed in Table II The command byte (Byte 1) has the following format TLD12475 – 10 FIGURE 7 Command Byte The MSB is always a ‘‘1’’ and is considered the start bit all leading ‘‘0’s’’ are ignored The first ‘‘1’’ detected on the ris- ing edge of SK indicates the initiation of a command The next 4 bits are the instruction opcode The final 3 bits are reserved and must always be ‘‘0’’ Data input of a command other than those listed in Table II is prohibited Data may be corrupted if unspecified commands are used TABLE II Instruction Set Command Byte 1 Byte 2 Byte 3 Get-Status 80H Set-Address 88H Block Address Page Address Increment 90H Read 98H Write A0H 55H Erase A8H Block Address 55H Data-Shift-In B0H Bits to Shift-In Data-Shift-Out B8H Bits to Shift-Out Read Last Block D0H Write Enable E0H Write Disable E8H Write Last Block F0H 55H GET-STATUS The Get-Status command allows the user to determine the status of the NM29A040080 It may be issued whether the device is busy or not The output is a status byte which indicates the internal state of the Serial Flash The output byte is defined as TLD12475 – 11 FIGURE 8 Get-Status Byte Bit 7 of the status byte tells whether the device is busy performing an operation (write erase etc) or is ready for a new command Bit 6 tells if a previous write or erase cycle completed successfully Bit 5 tells if the device is in a write enabled or disabled mode Bit 0 distinguishes between a 4-Mbit device and an 8-Mbit device The remaining bits are reserved for future use and may appear as any value (‘‘1’’ or ‘‘0’’) TLD12475 – 12 FIGURE 9 Get-Status Sequence SET-ADDRESS The Set-Address command defines which page and block of the memory is affected by an operation The Set-Address command is followed by two bytes the first indicating the block number and the second indicating the page number The block number chooses one of the 127254 blocks while the page number chooses one of the 128 pages within the given block The Set-Address command is usually followed by a Read Write or Data-Shift-In command Between the page address byte and the next command there is a delay of tSADD The address that is selected remains the active address until a new Set-Address or Increment command is given INCREMENT The Increment command automatically increments the se- lected page address When the Increment command is giv- en after the last page in a block has been read the address will roll over to the first page in the following block When the last page in the last addressable block is read out fol- lowed by an Increment command the new address is inde- terminate TLD12475 – 13 FIGURE 10 Increment Sequence READ The Read command transfers data from the selected page of the memory array into the data register To read the data out through DO the Read command is followed by the two byte Data-Shift-Out command There is a delay of tR be- tween the Read command and the Data-Shift-Out command as the data is transferred from the array to the on-chip buff- er During tR the status byte will indicate that the part is busy WRITE The Write command programs data from the 32-byte shift register into a page in the memory array for the currently selected address A security code 55H follows the Write command to ensure against accidental Writes Get-Status may be used to ensure that the operation was successful The Write command will be ignored if Write-Enable has not been set http www nationalcom 6 |
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