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CD74HCT125M96 Datasheet(PDF) 1 Page - Texas Instruments |
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CD74HCT125M96 Datasheet(HTML) 1 Page - Texas Instruments |
1 / 11 page 1 Data sheet acquired from Harris Semiconductor SCHS143C Features • Three-State Outputs • Separate Output Enable Inputs • Fanout (Over Temperature Range) - Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads - Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads • Wide Operating Temperature Range . . . -55oC to 125oC • Balanced Propagation Delay and Transition Times • Significant Power Reduction Compared to LSTTL Logic ICs • HC Types - 2V to 6V Operation - High Noise Immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V • HCT Types - 4.5V to 5.5V Operation - Direct LSTTL Input Logic Compatibility, VIL= 0.8V (Max), VIH = 2V (Min) - CMOS Input Compatibility, Il ≤ 1µA at VOL, VOH Description The ’HC125 and ’HCT125 contain 4 independent three-state buffers, each having its own output enable input, which when “HIGH” puts the output in the high impedance state. Pinout CD54HC125, CD54HCT125 (CERDIP) CD74HC125, CD74HCT125 (PDIP, SOIC) TOP VIEW Ordering Information PART NUMBER TEMP. RANGE (oC) PACKAGE CD54HC125F3A -55 to 125 14 Ld CERDIP CD54HCT125F3A -55 to 125 14 Ld CERDIP CD74HC125E -55 to 125 14 Ld PDIP CD74HC125M -55 to 125 14 Ld SOIC CD74HC125MT -55 to 125 14 Ld SOIC CD74HC125M96 -55 to 125 14 Ld SOIC CD74HCT125E -55 to 125 14 Ld PDIP CD74HCT125M -55 to 125 14 Ld SOIC CD74HCT125MT -55 to 125 14 Ld SOIC CD74HCT125M96 -55 to 125 14 Ld SOIC NOTE: When ordering, use the entire part number. The suffix 96 denotes tape and reel. The suffix T denotes a small-quantity reel of 250. 1OE 1A 1Y 2OE 2A 2Y GND VCC 4OE 4A 4Y 3OE 3A 3Y 1 2 3 4 5 6 7 14 13 12 11 10 9 8 November 1997 - Revised August 2003 CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures. Copyright © 2003, Texas Instruments Incorporated CD54HC125, CD74HC125, CD54HCT125, CD74HCT125 High-Speed CMOS Logic Quad Buffer, Three-State [ /Title (CD74 HC125 , CD74 HCT12 5) /Sub- ject (High Speed CMOS Logic Quad Buffer, Three- State) |
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