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providing a high degree of connectivity between the fully-connected PAL blocks. This allows

designs to be placed and routed efficiently.

The MACH211SP has two kinds of macrocell: output and buried. The MACH211SP output

macrocell provides registered, latched, or combinatorial outputs with programmable polarity. If a

registered configuration is chosen, the register can be configured as D-type or T-type to help

reduce the number of product terms. The register type decision can be made by the designer or

by the software. All output macrocells can be connected to an I/O cell. If a buried macrocell is

desired, the internal feedback path from the macrocell can be used, which frees up the I/O pin

for use as an input.

The MACH211SP has dedicated buried macrocells which, in addition to the capabilities of the

output macrocell, also provide input registers or latches for use in synchronizing signals and

reducing setup time requirements.

The MACH211SP is an enhanced version of the MACH211, adding the JTAG-compatible in-system

programming feature.

Vantis offers software design support for MACH devices through its own development system and

device fitters integrated into third-party CAE tools. Platform support extends across PCs, Sun and

HP workstations under advanced operating systems such as Windows 3.1, Windows 95 and NT,

SunOS and Solaris, and HPUX.

devices. It supports design entry with Boolean and behavioral syntax, state machine syntax and

truth tables. Functional simulation and static timing analysis are also included in this easy-to-use

system. This development system includes high-performance device fitters for all MACH devices.

The same fitter technology included in MACHXL software is seamlessly incorporated into third-party

tools from leading CAE vendors such as Synario, Viewlogic, Mentor Graphics, Cadence and MINC.

Interface kits and MACHXL configurations are also available to support design entry and verification

with other leading vendors such as Synopsys, Exemplar, OrCAD, Synplicity and Model Technology.

These MACHXL configurations and interfaces accept EDIF 2.0.0 netlists, generate JEDEC files for

MACH devices, and create industry-standard SDF, VITAL-compliant VHDL and Verilog output files for

design simulation.

enabling MACH device programmability through JTAG compliant ports and easy-to-use PC

interface. Additionally, MACHPRO generated vectors work seamlessly with HP3070, GenRad and

Teradyne testers to program MACH devices or test them for connectivity.

All MACH devices are supported by industry standard programmers available from a number of

vendors. These programmer vendors include Advin Systems, BP Microsystems, Data I/O

Corporation, Hi-Lo Systems, SMS GmbH, Stag House, and System General.