Command Address and Data Input

First cycle

Second cycle

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Command

of cycle

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1

Write

X

00H

Read

RA

Dout

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Read identified codes

2

Write

X

90H

Read

IA

ID

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2

Write

X

20H

Write

X

20H

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2

Write

EA

A0H

Read

X

EVD

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Setup auto erase/

2

Write

X

30H

Write

X

30H

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Setup program/

2

Write

X

40H

Write

PA

PD

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2

Write

X

C0H

Read

X

PVD

———————————————————————————————————————————————–

Reset

2

Write

X

FFH

Write

X

FFH

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Notes: 1. Refer to command program mode in mode selection about operation mode.

2. Refer to device identifier mode. IA = Identifier address, PA = Programming address, EA = Erase

verify address, RA = Read address

3. Refer to device identifier mode. PA are latched by programming command. ID = Identifier

output code, PD = Programming data, PVD = Programming verify output data, EVD = Erase

verify output data

5. All data in chip are erased. Erase data according to fast high-reliability erase flowchart.

6. All data in chip are erased. Data are erased automatically by internal logic circuit. External

erase verify is not required. Erasure completion must be verified by status polling after

automatic erase starts.

7. Program data according to fast high-reliability programming flowchart.

6

HN28F101 Series

HN28F101 Series