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EN29F010-70JIP Datasheet(PDF) 8 Page - Eon Silicon Solution Inc. |
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EN29F010-70JIP Datasheet(HTML) 8 Page - Eon Silicon Solution Inc. |
8 / 35 page This Data Sheet may be revised by subsequent versions ©2003 Eon Silicon Solution, Inc., www.essi.com.tw or modifications due to changes in technical specifications. 8 EN29F010 Rev. A, Issue Date: 2003/10/20 Table 5. EN29F010 Command Definitions 1 st Write Cycle 2 nd Write Cycle 3 rd Write Cycle 4 th Write Cycle 5 th Write Cycle 6 th Write Cycle Command Sequence Read/Reset Write Cycles Req’d Addr Data Addr Data Addr Data Addr Data Addr Data Addr Data Read 1 RA RD Reset 1 XXXh F0h Read/Reset 4 555h AAh 2AAh 55h 555h F0h RA RD AutoSelect Manufacturer ID 4 555h AAh 2AAh 55h 555h 90h 000h/ 100h 7Fh/ 1Ch AutoSelect Device ID 4 555h AAh 2AAh 55h 555h 90h 01h 20h AutoSelect Sector Protect Verify 4 555h AAh 2AAh 55h 555h 90h BA & 02h 00h/ 01h Byte Program 4 555h AAh 2AAh 55h 555h A0h PA PD Chip Erase 6 555h AAh 2AAh 55h 555h 80h 555h AAh 2AAh 55h 555h 10h Sector Erase 6 555h AAh 2AAh 55h 555h 80h 555h AAh 2AAh 55h BA 30h Sector Erase Suspend 1 xxxh B0h Sector Erase Resume 1 xxxh 30h Notes: RA = Read Address: address of the memory location to be read. This one is a read cycle. RD = Read Data: data read from location RA during Read operation. This one is a read cycle. PA = Program Address: address of the memory location to be programmed PD = Program Data: data to be programmed at location PA BA = Sector Address: address of the Sector to be erased. Address bits A16-A14 uniquely select any Sector. The data is 00h for an unprotected sector and 01h for a protected sector. Byte Programming Command Programming the EN29F010 is performed on a byte-by-byte basis using a four bus-cycle operation (two unlock write cycles followed by the Program Setup command and Program Data Write cycle). When the program command is executed, no additional CPU controls or timings are necessary. An internal timer terminates the program operation automatically. Address is latched on the falling edge of CE or WE , whichever is last; data is latched on the rising edge of CE or WE , whichever is first. The program operation is completed when EN29F010 returns the equivalent data to the programmed location. Programming status may be checked by sampling data on DQ7 (DATA polling) or on DQ6 (toggle bit). Changing data from 0 to 1 requires an erase operation. When programming time limit is exceeded, DQ5 will produce a logical “1” and a Reset command can return the device to Read mode. Chip Erase Command Chip erase is a six-bus-cycle operation. The chip erase command sequence is initiated by writing two unlock cycles, followed by a set-up command. Two additional unlock write cycles are then followed by the chip erase command, which in turn invokes the Embedded Erase algorithm. The device does not require the system to preprogram prior to erase. The Embedded Erase algorithm automatically preprograms and verifies the entire memory for an all zero data pattern prior to electrical erase. The system is not required to provide any controls or timings during these operations. The Command Definitions table shows the address and data requirements for the chip erase command sequence. |
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