EM614163 datasheet(8/23 Pages) ETC

Part #	EM614163

Description	256K x 16 High Speed EDO DRAM

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Manufacturer	ETC [List of Unclassifed Manufacturers]

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EtronTech

Em614163A-30/35/40/45

Preliminary

8

April 1997

EDO Page Mode Cycle

Em614163A

Parameter

Symbol

-30/35/40/45

Unit

Notes

Min

Max

EDO page mode cycle time

tPC

13.3/15/16/18

¡Ð

ns

25

EDO page mode U/LCAS precharge

time

tCP

5/5/5/6

¡Ð

ns

23

EDO page mode RAS pulse width

tRASP

30/35/40/45

100,000

ns

24

Access time from U/LCAS precharge

tCPA

¡Ð

18/21/23/25

ns

11, 15

RAS hold time from U/LCAS precharge

tCPRH

13/14/15/16

¡Ð

ns

EDO page mode read-modify-write cycle

U/LCAS precharge to WE delay time

tCPW

27/31/36/41

¡Ð

ns

11

EDO page mode read-modify-write cycle

time

tPRWC

35/40/45/50

¡Ð

ns

OE low to CAS high setup time

tOES

5

¡Ð

ns

OE high hold time from CAS high

tOEHC

6

¡Ð

ns

OE high pulse width

tOEP

6

¡Ð

ns

OE setup prior to RAS during hidden

refresh cycle

tORD

0

¡Ð

ns

Data output hold after CAS low

tCOH

3/3/3/5

¡Ð

ns

Output disable delay from WE

tWHZ

0

13

ns

WE pulse width for output disable when

CAS high

tWPZ

6

¡Ð

ns

Counter Test Cycle

U/LCAS precharge time in counter test

cycle

tCPT

30

¡Ð

ns

23

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