S29WS256N0PBAW011 datasheet(6/99 Pages) SPANSION

Part #	S29WS256N0PBAW011

Description	256/128/64 MEGABIT CMOS 1.8 VOLT ONLY SIMULTANEOUS READ/WRITE BURST MODE FLASH MEMORY

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Manufacturer	SPANSION [SPANSION]

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S29WS-N MirrorBit™ Flash Family

S29WS-N_00_G0 January25,2005

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Information

Figures

Figure 3.1.

S29WS-N Block Diagram..................................................................................................................... 8

Figure 4.1.

84-ball Fine-Pitch Ball Grid Array (S29WS256N, S29WS128N).................................................................10

Figure 4.2.

VBH084—84-ball Fine-Pitch Ball Grid Array (FBGA) 8 x 11.6 mm MCP Compatible Package .........................11

Figure 4.3.

80-ball Fine-Pitch Ball Grid Array (S29WS064N) ....................................................................................12

Figure 4.4.

TLC080—80-ball Fine-Pitch Ball Grid Array (FBGA) 7 x 9 mm MCP Compatible Package...............................13

Figure 4.5.

MCP Look-ahead Diagram ..................................................................................................................15

Figure 7.1.

Synchronous/Asynchronous State Diagram...........................................................................................21

Figure 7.2.

Synchronous Read ............................................................................................................................23

Figure 7.3.

Single Word Program.........................................................................................................................29

Figure 7.4.

Write Buffer Programming Operation ...................................................................................................33

Figure 7.5.

Sector Erase Operation ......................................................................................................................36

Figure 7.6.

Write Operation Status Flowchart ........................................................................................................43

Figure 8.1.

Advanced Sector Protection/Unprotection .............................................................................................50

Figure 8.2.

PPB Program/Erase Algorithm .............................................................................................................53

Figure 8.3.

Lock Register Program Algorithm.........................................................................................................56

Figure 11.1. Maximum Negative Overshoot Waveform .............................................................................................64

Figure 11.2. Maximum Positive Overshoot Waveform...............................................................................................64

Figure 11.3. Test Setup .......................................................................................................................................64

Figure 11.4. Input Waveforms and Measurement Levels...........................................................................................66

Figure 11.5. VCC Power-up Diagram ......................................................................................................................66

Figure 11.6. CLK Characterization .........................................................................................................................68

Figure 11.7. CLK Synchronous Burst Mode Read......................................................................................................70

Figure 11.8. 8-word Linear Burst with Wrap Around.................................................................................................71

Figure 11.9. 8-word Linear Burst without Wrap Around ............................................................................................71

Figure 11.10. Linear Burst with RDY Set One Cycle Before Data ..................................................................................72

Figure 11.11. Asynchronous Mode Read...................................................................................................................73

Figure 11.12. Reset Timings...................................................................................................................................74

Figure 11.13. Chip/Sector Erase Operation Timings ...................................................................................................76

Figure 11.14. Asynchronous Program Operation Timings............................................................................................77

Figure 11.15. Synchronous Program Operation Timings .............................................................................................78

Figure 11.16. Accelerated Unlock Bypass Programming Timing ...................................................................................79

Figure 11.17. Data# Polling Timings (During Embedded Algorithm) .............................................................................79

Figure 11.18. Toggle Bit Timings (During Embedded Algorithm) ..................................................................................80

Figure 11.19. Synchronous Data Polling Timings/Toggle Bit Timings ............................................................................80

Figure 11.20. DQ2 vs. DQ6 ....................................................................................................................................81

Figure 11.21. Latency with Boundary Crossing when Frequency > 66 MHz....................................................................81

Figure 11.22. Latency with Boundary Crossing into Program/Erase Bank ......................................................................82

Figure 11.23. Example of Wait States Insertion ........................................................................................................83

Figure 11.24. Back-to-Back Read/Write Cycle Timings ...............................................................................................84

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SPANSION	S29WS128J	1Mb / 98P	128/64 Megabit (8/4 M x 16-Bit) CMOS 1.8 Volt-only Simultaneous Read/Write, Burst Mode Flash Memory
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