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TK68HC24 Datasheet(PDF) 2 Page - List of Unclassifed Manufacturers |
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2 / 21 page Tekmos TK68HC24 PRU 2 www.Tekmos.com 8/21/99 Pinout PDIP 40 PLCC 44 Name Type Function 1 2 IOTEST N / C Not used in the Tekmos design 2-5 3-6 A15 – A12 Input Address lines for port mapping. 6 7 STRA Input Handshake input 7-14 8-11, 13-16 PC0 – PC7 Bidirec tional General purpose input / output port 15 17 VDD Supply Positive supply 16 18 STRB Output Handshake output 17-24 19-22, 24-27 PB7 – PB0 Output General purpose output port 25 28 IRQN Output Interrupt Request, open drain, active low 26 29 VSS Supply Ground 27-34 30-33, 35-38 AD7 - AD0 Bidirec tional Multiplexed address / data bus from the 68HC11 35 39 RESETN Input Reset, active low 36 40 RWN Input Read / Write control signal 37 41 E Input Enable – clock 38 42 AS Input Address strobe 39 43 MODE Input Selects operating mode at reset. 40 44 CSN Input Chip select Pin Descriptions IOTEST No Connect The IOTEST pin was removed from the 68HC24 design several years ago. However, it continued to be referenced on the data sheet. This pin is a true no connect, and may be either tied to a convenient supply, used for routing other signals, or it may be left floating. A15 – A12 High Order Address - Inputs These are the high order address lines from the processor. They are latched by the rising edge of the E clock. The value on the address lines is compared against the contents of the INIT register. A match, combined with an active chip select selects the part during the current bus cycle. AD7 – AD0 Address and Data Bus - Bidirectional These pins are a multiplexed address / data bus. During the first portion of the bus cycle, when the E clock is low, the AD bus contains the address. The address is strobed into an internal address latch by the ALE pin. During the second portion of the bus cycle, when the E clock is high, the AD pins carry data. Depending on the state of the RWN pin, the part will either read the bus, or drive the bus. STRA Strobe A – Input This pin is used as an input handshake signal by Port C. In the simple strobed and input handshake modes, STRA is used to latch data into the PORTCL register. In the output handshake mode, STRA is used to acknowledge the output data. The EGA bit in the PIOC register controls which edge of STRA is active. STRB Strobe B - Output The STRB pin serves as an output strobe for Port B when the part is operating in the simple strobed I/O mode. In the handshake mode, STRB is a handshake output line. In the input handshake mode, the pin serves as a READY line, inhibiting the external device from strobing data into Port C. In the output handshake mode, STRB indicates that new data has been written to Port B by the |
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