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Publication Number S29CD016_00 Revision A Amendment 4 Issue Date November 5, 2004 The contents of this document are subject to change without notice. This document may contain information on a Spansion product under development by Spansion LLC. Spansion LLC reserves the right to change or discontinue work on any product without notice. The information in this document is provided “as is” without warranty or guarantee of any kind as to its accuracy, completeness, operability, fitness for particular purpose, merchantability, non-infringement of third-party rights, or any other warranty, express, implied, or statutory. Spansion LLC assumes no liability for any damages of any kind arising out of the use of the information in this document. S29CD016G 16 Megabit (512 K x 32-Bit) CMOS 2.5 Volt-only Burst Mode, Dual Boot, Simultaneous Read/Write Flash Memory Data Sheet Distinctive Characteristics Architecture Advantages Simultaneous Read/Write operations — Two bank architecture: large bank/ small bank — Data can be read from bank while executing erase/ program functions in other bank — Zero latency between read and write operations User-Defined x32 Data Bus Dual Boot Block — Top and bottom boot sectors in the same device Flexible sector architecture — Eight 8 Kbytes, thirty 64 Kbytes, and eight 8 Kbytes sectors Manufactured on 170 nm process technology SecSi (Secured Silicon) Sector (256 Bytes) — Factory locked and identifiable: 16 bytes for secure, random factory Electronic Serial Number; remainder may be customer data programmed by Spansion™ — Customer lockable: Can be read, programmed, or erased just like other sectors. Once locked, data cannot be changed Programmable Burst interface — Interface to any high performance processor — Modes of Burst Read Operation: — Linear Burst: 4 double words and 8 double words with wrap around Program Operation — Ability to perform synchronous and asynchronous write operations of burst configuration register settings independently Single power supply operation — Optimized for 2.5 to 2.75 volt read, erase, and program operations Compatibility with JEDEC standards (JC42.4) — Software compatible with single-power supply Flash — Backward-compatible with AMD Am29LV and Am29F and Fujitsu MBM29LV and MBM29F flash memories Performance Characteristics High performance read access — Initial/random access times as fast as 54 ns — Burst access time as fast as 9 ns for ball grid array package Ultra low power consumption — Burst Mode Read: 90 mA @ 66 MHz max, — Program/Erase: 50 mA max — Standby mode: CMOS: 60 µA max 1 million write cycles per sector typical 20 year data retention typical VersatileI/O™ control — Device generates data output voltages and tolerates data input voltages as determined by the voltage on the VIO pin — 1.65 V to 2.75 V compatible I/O signals — 3.6 V tolerant I/O signals Software Features Persistent Sector Protection — A command sector protection method to lock combinations of individual sectors and sector groups to prevent program or erase operations within that sector (requires only VCC levels) Password Sector Protection — A sophisticated sector protection method to lock combinations of individual sectors and sector groups to prevent program or erase operations within that sector using a user-definable 64-bit password Supports Common Flash Interface (CFI) Unlock Bypass Program Command — Reduces overall programming time when issuing multiple program command sequences Data# Polling and toggle bits — Provides a software method of detecting program or erase operation completion Hardware Features Program Suspend/Resume & Erase Suspend/ Resume — Suspends program or erase operations to allow reading, programming, or erasing in same bank Hardware Reset (RESET#), Ready/Busy# (RY/ BY#), and Write Protect (WP#) inputs ACC input — Accelerates programming time for higher throughput during system production Package options — 80-pin PQFP — 80-ball Fortified BGA |
