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HPL1117V Datasheet(PDF) 10 Page - List of Unclassifed Manufacturers |
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HPL1117V Datasheet(HTML) 10 Page - List of Unclassifed Manufacturers |
10 / 19 page Rev. B.13 - Mar., 2004 HPL1117 10 Copyright HIPAC Semiconductor, Inc. www.hipacsemi.com The HPL1117 requires an output capacitor to maintain stability and improve transient response. Proper ca- pacitor selection is important to ensure proper operation. The HPL1117 output capacitor selection is dependent upon the ESR (equivalent series resistance) of the output capacitor to maintain stability. When the output capacitor is 10uF or greater, the output capaci- tor should have an ESR less than 1 Ω.This will improve transient response as well as promote stability. A low- ESR solid tantalum capacitor works extremely well and provides good transient response and stability over temperature. V IN HPL1117 OUT IN ADJ R1 R2 Rp PARASITIC LINE RESISTANCE CONNECT R1 TO CASE CONNECT R2 TO LOAD RL Output Voltage V IN HPL1117 OUT IN ADJ VREF R1 R2 V OUT IADJ 60 µA Application Information Input Capacitor Output Capacitor The HPL1117 develops a 1.25V reference voltage be- tween the output and the adjust terminal. By placing a resistor between these two terminals, a constant Current is caused to flow through R1 and down through R2 to set the overall output voltage. Normally this current is chosen to be the specified minimum load current of 10mA. For fixed voltage devices R1 and R2 are included in the device. Load Regulation When the adjustable regulator is used. Load regula- tion will be limited by the resistance of the wire con- necting the regulator to the load. The data sheet speci- fication for load regulation is measured at the output pin of the device. Best load regulation is obtained when the top of the resistor divider (R1) is tied di- rectly to the output pin of the device, not to the load. For fixed voltage devices the top of R1 is internally connected to the output, and the ground pin can be connected to low side of the load. If R1 were con- nected to the load, RP is multiplied by the divider ratio, the effective resistance between the regulator and the load would be: An input capacitor of 10 µF or greater is recommended. Tantalum, or aluminum electrolytic capacitors can be used for bypassing. Larger Val- ues will improve ripple rejection by bypassing the in- put to the regulator. VOUT = VREF(1+ )+IADJR2 R2 R1 Figure 1. Basic Adjustable Regulator Figure 2. Connections for Best Load Regulation Rp X (1+ ), Rp = Parasitic Line Resistance R2 R1 |
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