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BS62UV1027SI-10 Datasheet(PDF) 4 Page - Brilliance Semiconductor

Part # BS62UV1027SI-10
Description  Ultra Low Power/Voltage CMOS SRAM 128K X 8 bit
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Manufacturer  BSI [Brilliance Semiconductor]
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Logo BSI - Brilliance Semiconductor

BS62UV1027SI-10 Datasheet(HTML) 4 Page - Brilliance Semiconductor

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Revision 2.1
Jan.
2004
4
R0201-BS62UV1027
AC ELECTRICAL CHARACTERISTICS ( TA = -40 to + 85oC )
READ CYCLE
KEY TO SWITCHING WAVEFORMS
WAVEFORM
INPUTS
OUTPUTS
MUST BE
STEADY
MAY CHANGE
FROM H TO L
DON T CARE:
ANY CHANGE
PERMITTED
DOES NOT
APPLY
MUST BE
STEADY
WILL BE
CHANGE
FROM H TO L
CHANGE :
STATE
UNKNOWN
CENTER
LINE IS HIGH
IMPEDANCE
”OFF ”STATE
MAY CHANGE
FROM L TO H
WILL BE
CHANGE
FROM L TO H
,
BSI
BS62UV1027
AC TEST CONDITIONS
(Test Load and Input/Output Reference)
Input Pulse Levels
Vcc / 0V
Input Rise and Fall Times
1V/ns
Input and Output
Timing Reference Level
0.5Vcc
Output Load
CL = 30pF+1TTL
CL = 100pF+1TTL
JEDEC
PARAMETER
NAME
PARAMETER
NAME
DESCRIPTION
CYCLE TIME : 85ns
(Vcc = 1.9~3.6V)
(Vcc = 1.9~3.6V)
UNIT
t
AVAX
t
RC
Read Cycle Time
85
--
--
100
--
--
ns
t
AVQV
t
AA
Address Access Time
--
--
85
--
--
100
ns
t
E1LQV
t
ACS1
Chip Select Access Time
--
--
85
--
--
100
ns
t
E2HOV
t
ACS2
--
--
85
--
--
100
ns
t
GLQV
t
OE
Output Enable to Output Valid
--
--
40
--
--
50
ns
t
E1LQX
t
CLZ1
Chip Select to Output Low Z
15
--
--
15
--
--
ns
t
E2HOX
t
CLZ2
15
--
--
15
--
--
ns
t
GLQX
t
OLZ
Output Enable to Output in Low Z
15
--
--
15
--
--
ns
t
E1HQZ
t
CHZ1
Chip Deselect to Output in High Z
--
--
35
--
--
40
ns
t
E2HQZ
t
CHZ2
--
--
35
--
--
40
ns
t
GHQZ
t
OHZ
Output Disable to Output in High Z
--
--
30
--
--
35
ns
t
AXOX
t
OH
Data Hold from Address Change
15
--
--
15
--
--
ns
MIN. TYP. MAX.
MIN. TYP. MAX.
Chip Select Access Time
(CE2)
(CE1)
Chip Select to Output Low Z
(CE1)
(CE2)
Chip Deselect to Output in High Z
(CE1)
(CE2)
CYCLE TIME : 100ns


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