TC55V8512FTI-15 datasheet(4/10 Pages) TOSHIBA

Part #	TC55V8512FTI-15

Description	TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS

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Manufacturer	TOSHIBA [Toshiba Semiconductor]

Direct Link	http://www.semicon.toshiba.co.jp/eng

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4 / 10 page

TC55V8512JI/FTI-12,-15

2001-12-19

4/10

AC CHARACTERISTICS (Ta

==== −−−−40° to 85°C

(See Note 1)

, VDD

==== 3.3 V ±±±± 0.3 V)

READ CYCLE

TC55V8512JI/FTI

-12

-15

SYMBOL

PARAMETER

MIN

MAX

MIN

MAX

UNIT

tRC

Read Cycle Time

12



15



tACC

Address Access Time



12



15

tCO

Chip Enable Access Time



12



15

tOE

Output Enable Access Time



6



8

tOH

Output Data Hold Time from Address Change

3



4



tCOE

Output Enable Time from Chip Enable

3



4



tOEE

Output Enable Time from Output Enable

1



1



tCOD

Output Disable Time from Chip Enable



7



8

tODO

Output Disable Time from Output Enable



7



8

ns

WRITE CYCLE

TC55V8512JI/FTI

-12

-15

SYMBOL

PARAMETER

MIN

MAX

MIN

MAX

UNIT

tWC

Write Cycle Time

12



15



tWP

Write Pulse Width

8



9



tCW

Chip Enable to End of Write

10



12



tAW

Address Valid to End of Write

10



12



tAS

Address Setup Time

0



0



tWR

Write Recovery Time

0



0



tDS

Data Setup Time

7



8



tDH

Data Hold Time

0



0



tOEW

Output Enable Time from Write Enable

1



1



tODW

Output Disable Time from Write Enable



7



8

ns

AC TEST CONDITIONS

Fig.1

PARAMETER

TEST CONDITION

Input Pulse Level

3.0 V/ 0.0 V

Input Pulse Rise and Fall Time

2 ns

Input Timing Measurement

Reference Level

1.5 V

Output Timing Measurement

Reference Level

1.5 V

Output Load

Fig.1

I/O pin

CL = 30 pF

Z0 = 50 Ω

RL = 50 Ω

VL = 1.5 V

I/O pin

CL = 5 pF

870

Ω

(For tCOE, tOEE, tCOD,

tODO, tOEW and tODW)

3.3 V

1200

Ω

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