CY7C371
7c371: Tuesday, May 26, 1992
Revision: August 9, 1995
4
AC Test Loads and Waveforms
7c3714
7c3715
90%
10%
3.0V
GND
90%
10%
ALL INPUT PULSES
5V
OUTPUT
35 pF
INCLUDING
JIG AND
SCOPE
5V
OUTPUT
5 pF
INCLUDING
JIG AND
SCOPE
(a)
(b)
< 2 ns
< 2 ns
OUTPUT
238W (COM'L)
319W (MIL)
170W (COM'L)
236W (MIL)
99W (COM'L)
136W (MIL)
Equivalent to:
THÉVENIN EQUIVALENT
2.08V (COM'L)
2.13V (MIL)
238W (COM'L)
319W (MIL)
170W (COM'L)
236W (MIL)
(c)
7c3716
Parameter
VX
Output WaveformMeasurement Level
tER (-)
1.5V
VOH
0.5V
VX
0.5V
tER (+)
2.6V
VOL
VX
tEA (+)
1.5V
0.5V
tEA (-)
Vthc
VX
VOL
0.5V
VX
VOH
7c3717
7c3718
7c3719
7c37110
(d) Test Waveforms
Switching Characteristics Over the Operating Range[7]
7C371-143
7C371-110
7C371-83
7C371L-83
7C371-66
7C371L-66
Parameter
Description
Min. Max. Min. Max. Min. Max. Min. Max. Unit
Combinatorial Mode Parameters
tPD
Input to Combinatorial Output
8.5
10
12
15
ns
tPDL
Input to Output Through Transparent Input or
Output Latch
11.5
13
18
22
ns
tPDLL
Input to Output Through Transparent Input and
Output Latches
13.5
15
20
24
ns
tEA
Input to Output Enable
13
14
19
24
ns
tER
Input to Output Disable
13
14
19
24
ns
Input Registered/Latched Mode Parameters
tWL
Clock or Latch Enable Input LOW Time[4]
2.5
3
4
5
ns
tWH
Clock or Latch Enable Input HIGH Time[4]
2.5
3
4
5
ns
tIS
Input Register or Latch SetUp Time
2
2
3
4
ns
tIH
Input Register or Latch Hold Time
2
2
3
4
ns
tICO
Input Register Clock or Latch Enable to Combina
torial Output
12
14
19
24
ns
tICOL
Input Register Clock or Latch Enable to Output
Through Transparent Output Latch
14
16
21
26
ns
Shaded area contains preliminary information.
Note:
6. All AC parameters are measured with 16 outputs switching.
7. This specification is intended to guarantee interface compatibility of
the other members of the CY7C370 family with the CY7C371. This
specification is met for the devices operating at the same ambient tem
perature and at the same power supply voltage.
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