LTC1730-4/LTC1730-4.2

8

1730f

Stop Charging

The charger is off when any of the following conditions

is less than 50mV (shutdown mode). The trickle charge

current source and the internal pass transistor are turned

off. The internal resistor divider is disconnected to reduce

the current drain on the battery when in sleep mode.

Input Voltage (Wall Adapter)

The input voltage to the LTC1730 must have some

method of current limit capability. The current limit level

of the input power source must be lower than the

will turn on briefly and then immediately turn off after the

overcurrent condition is detected. This cycle will be re-

time has run out. If overcurrent protection is not needed,

Trickle Charge and Defective Battery Detection

At the begining of the charge cycle, if the cell voltage is low

(less than 2.45V) the charger goes into a 35mA trickle

charge mode. If the low cell voltage persists for one

quarter of the total charge time, the battery is considered

defective and the charge cycle is terminated. The CHRG

pin output is then forced to a high impedance state.

Battery Charge Current

The battery charge current is determined by the current

limit of the input supply (wall adapter). However, this

current must not exceed the maximum charge overcurrent,

is immediately terminated, the GATE pin is pulled to

ground and the charge pump turns off. The charging will

Programming the Timer

The programmable timer is used to terminate the charge

and sets the minimum ON/OFF time and the overcurrent

time-off period. The length of the timer is programmed by

an external capacitor from the TIMER pin to ground. The

total charge time is:

The timer starts when the input voltage (at least 40mV

time-out has occurred, the charging stops and the CHRG

pin becomes high impedance.

CHRG Status Output Pin

This open-drain output requires a pull-up resistor and can

be used to indicate three charging conditions. When fast

charging begins, an N-FET (capable of driving an LED)

turns on, pulling this pin to ground. Once the duty cycle at

the GATE pin drops below 10%, the N-FET turns off and a

40

µA current source to ground turns on. When a time-out

occurs or the input supply is removed, the CHRG pin goes

high impedance indicating that the charge cycle has ended.

By using two different value resistors, a microprocessor

can detect three states from this pin: charging, C/10 and

stop charging (see Figure 1).

APPLICATIO S I FOR ATIO

CHRG

1730 F01

LTC1730

2k

620k

3

2

OUT

IN

MICROPROCESSOR

Figure 1. Interfacing with Microprocessor

When the LTC1730 is in charge mode, the CHRG pin is

pulled to ground by an internal N-MOSFET. To detect this

mode, force the digital output pin, OUT, high and measure

the voltage at the CHRG pin. The N-MOSFET will pull the

pin low even with a 2k pull-up resistor. Once the charge

current drops below 10% of the full scale current (C/10),

the N-MOSFET is turned off and a 40

µA current source is

connected to the CHRG pin. By forcing the OUT pin to a

high impedance state, the current source will pull the pin

low through the 620k resistor. When the internal timer has

expired, the CHRG pin becomes high impedance and the

620k resistor will pull the pin high to indicate that charging

has stopped.