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AD8113JST Datasheet(PDF) 11 Page - Analog Devices |
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AD8113JST Datasheet(HTML) 11 Page - Analog Devices |
11 / 28 page REV. A AD8113 –11– SERIES RESISTANCE – 0 300 35 250 200 150 100 50 0 510 15202530 VS = 12V RL = 600 VS = 5V RL = 150 TPC 13. Cap Load vs. Series Resistance for Less than 30% Overshoot 1 100 1k 10k 10 FREQUENCY – MHz 0.1 10 1 100 1000 TPC 14. Disabled Output Impedance vs. Frequency, VS = ±5 V 1 100 1k 10 FREQUENCY – MHz 0.1 10 1 100 1000 0.1 TPC 15. Enabled Output Impedance vs. Frequency, VS = ±5 V INPUT OUTPUT 5ns/DIV 05 10 15 20 25 30 35 40 45 50 OUTPUT – INPUT 2 TPC 16. Settling Time to 0.1%, 2 V Step, VS = ±5 V, RL = 150 Ω 1 100 1k 10k 10 FREQUENCY – MHz 0.1 10 1 100 1000 TPC 17. Disabled Output Impedance vs. Frequency, VS = ±12 V 1 100 1k 10 FREQUENCY – MHz 0.1 10 1 100 1000 0.1 TPC 18. Enabled Output Impedance vs. Frequency, VS = ±12 V |
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