1024K x 8 MoBL Static RAM
CY62158CV25/30/33
MoBL™
Cypress Semiconductor Corporation
•
3901 North First Street
•
San Jose
•
CA 95134
•
408-943-2600
Document #: 38-05019 Rev. *C
Revised April 24, 2002
Features
• High Speed
— 55 ns and 70 ns availability
• Voltage range:
— CY62158CV25: 2.2V–2.7V
— CY62158CV30: 2.7V–3.3V
— CY62158CV33: 3.0V–3.6V
• Ultra low active power
— Typical active current: 1.5 mA @ f = 1 MHz
— Typical active current: 5.5 mA @ f = fmax(70 ns speed)
• Low standby power
• Easy memory expansion with CE1, CE2 and OE features
• Automatic power-down when deselected
• CMOS for optimum speed/power
Functional Description
The CY62158CV25/30/33 are high-performance CMOS static
RAMs organized as 1024K words by 8 bits. This device fea-
tures advanced circuit design to provide ultra-low active cur-
rent. This is ideal for providing More Battery Life™ (MoBL™)
in portable applications such as cellular telephones. The de-
vice also has an automatic power-down feature that signifi-
cantly reduces power consumption by 80% when addresses
are not toggling. The device can be put into standby mode
reducing power consumption by more than 99% when dese-
lected (CE1 HIGH or CE2 LOW).
Writing to the device is accomplished by taking Chip Enable 1
(CE1) and Write Enable (WE) inputs LOW and Chip Enable 2
(CE2) HIGH. Data on the eight I/O pins (I/O0 through I/O7) is
then written into the location specified on the address pins (A0
through A19).
Reading from the device is accomplished by taking Chip En-
able 1 (CE1) and Output Enable (OE) LOW and Chip Enable
2 (CE2) HIGH while forcing Write Enable (WE) HIGH. Under
these conditions, the contents of the memory location speci-
fied by the address pins will appear on the I/O pins.
The eight input/output pins (I/O0 through I/O7) are placed in a
high-impedance state when the device is deselected (CE1
LOW and CE2 HIGH), the outputs are disabled (OE HIGH), or
during a write operation (CE1 LOW and CE2 HIGH and WE
LOW).
The CY62158CV25/30/33 are available in a 48-ball FBGA
package.
Logic Block Diagram
A1
A2
A3
A4
A5
A6
A7
A8
COLUMN
DECODER
Data in Drivers
POWER
DOWN
WE
OE
I/O0
I/O1
I/O2
I/O3
1024K x 8
ARRAY
I/O7
I/O6
I/O5
I/O4
A0
A9
CE1
CE2
A10
A11
A12
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