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MX10C8050PI Datasheet(PDF) 10 Page - List of Unclassifed Manufacturers |
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MX10C8050PI Datasheet(HTML) 10 Page - List of Unclassifed Manufacturers |
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10 / 14 page  10 P/N:PM0591 REV. 0.3, APR. 09, 1999 MX10C805X External clock drive XTAL SYMBOL PARAMETER VARIABLE CLOCK UNIT MIN MAX fCLK clock frequency 1.2 16 (tbf.) MHz tCLCL clock period 63 833 ns tCHCX HIGH time 20 tCK-tCLCX ns tCLCX LOW time 20 tCK-tCHCX ns tCLCH RISE time - 20 ns tCHCL FALL time - 20 ns tCY cycle time (tCY = 12 tCK) 0.75 10 ms SERIAL PORT CHARACTERISTICS Serial Port Timing : Shift Register Mode VDD = 5V±10%; VSS = 0V; Tamb=0°C; Load Capacitance = 80 pF SYMBOL PARAMETER 33 MHz OSCILLATOR UNIT MIN MAX tXLXL Serial Port clock cycle time 360 - ns tQVXH Output data setup to clock rising edge 167 - ns tXHQX Output data hold after clock rising edge 5 - ns tXHDX Input data hold after clock rising edge 0 - ns tXHDV Clock rising edge to input data valid - 167 ns EXTERNAL CLOCK DRIVE WAVEFORM AC TESTING INPUT, OUTPUT WAVEFORMS FLOAT WAVEFORM 0.45V 0.2 VCC-0.1 TCHCL TCLCX TCLCL TCLCH TCHCX VCC-0.5 0.7 VCC 0.2 VCC+0.9 AC Inputs during testing are driven at VCC-0.5V for a Logic "1" 0.45V for a Logic "0". Timing measurements are made at VIH min for a Logic "1" and VIL max for a Logic "0". 0.2 VCC-0.1 0.45V VCC-0.5 VLOAD TIMING REFERENCE POINTS VLOAD-0.1V VLOAD+0.1V VOL+0.1V VOH-0.1V For timing purposes a port pin is no longer floating when a 100 mV change from load voltage occurs, and begins to float when a 100mV change form the loaded VOH/VOL level occurs. IOL/IOH = + 20 mA |
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