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MX10C8058FC Datasheet(PDF) 6 Page - List of Unclassifed Manufacturers |
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MX10C8058FC Datasheet(HTML) 6 Page - List of Unclassifed Manufacturers |
6 / 14 page 6 P/N:PM0591 REV. 0.3, APR. 09, 1999 MX10C805X DC CHARACTERISTICS (Over Operating Conditions) All parameter values apply to all devices unless otherwise indicated. Symbol Parameter Min Typ Max Unit Test Conditions (Note 4) VIL Input Low Voltage -0.5 0.2 VCC-0.1 V VIL1 Input Low Voltage EA 0 0.2 VCC-0.3 V VIH Input High Voltage 0.2 VCC+0.9 VCC+0.5 V (Except XTAL1, RST) VIH1 Input High Voltage 0.7 VCC VCC+0.5 V (XTAL1, RST) VOL Output Low Voltage (Note 5) (Ports 1, 2, and 3) 0.4 V IOL=1.6 mA (Note 1) VOL1 Output Low Voltage (Note 5) (Port 0, ALE, PSEN) 0.4 V IOL=3.2 mA (Note 1) VOH Output High Voltage 0.9 VDD V IOH=-10 uA (Port 1, 2 and 3, ALE, PSEN) 0.75 VDD V IOH=-30 uA 0.5 VDD V IOH=-60uA VOH1 Output High Voltage 0.9 VDD V IOH=-80 uA (Port 0 in External Bus Mode) 0.75 VDD V IOH=-300 uA 0.5 VDD V IOH=-800 uA IIL Logical 0 Input Current -50 uA VIN=0.4V (Ports 1, 2 and 3) ILI Input leakage Current (Port 0) ± 10 uA VIN=VIL or VIH ITL Logical 1 to 0 Transition Current -750 uA VIN=2V (Ports 1, 2 and 3) Industrial PRST RST Pulldown Resistor 15 150 K ohm CIO Pin Capacitance 10 pF @1 MHz, 25°C ICC Power Supply Current: (Note 3) Active Mode at 40 MHz 60 mA Idle Mode at 40 MHz(70°C 5.5V) 28 mA Power Down Mode 2 10 uA NOTES: 1. Capacitive loading on Ports 0 and 2 may cause noise pulses above 0.4V to be superimposed on the VOLs of ALE and Ports 1, 2 and 3. The noise is due to external bus capacitance discharging into the Port 0 and Port 2 pins when these pins change from 1 to 0. In applications where capacitive loading exceeds 100 pF, the noise pulses on these signlas may exceed 0.8V. It may be desirable to qualify ALE or other signals with a Schmitt Triggers, or CMOS-level input logic. 2. Capacitive loading on Ports 0 and 2 cause the VOH on ALE and PSEN to drop below the 0.9 VCC specification when the address lines are stabilizing. 3. Minimum VCC for Power Down is 2V. 4. Typicals are based on a limited number of samples and are not guaranteed. The values listed are room temperature and 5V. 5. Under steady state (non-transient) conditions, IOL must be externally limited as follows: Maximum IOL per port pin: 10mA Maximum IOL per 8-bit port: Port 0: 26mA Ports 1, 2 and 3: 15mA Maximum total IOL for all output pins: 71mA If IOL exceeds the test condition, VOL may exceed the related specification. Pins are not guaranteed to sink current greater than the listed test conditions. |
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