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TPS65917-Q1 Datasheet(PDF) 39 Page - Texas Instruments

Part # TPS65917-Q1
Description  Power Management Unit (PMU) for Processor
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

TPS65917-Q1 Datasheet(HTML) 39 Page - Texas Instruments

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Selectable
platform
settings
Static
platform
settings
(Default config for
all boot; I/O mux,
default voltage)
Sequence
Platform
Settings
(State transition
microprogram)
Registers updates during
OFF, ACTIVE, and SLEEP
transition
Initialization done at reset
Reload during
OFF state transition
Platform settings
are modifiable by
microcontroller
during OFF,
ACTIVE, and
SLEEP transition
Switch ON event,
supply threshold
Voltage modification,
resource
enable and disable
BOOT
RD
Power IC
Resource
configuration and
control registers
Microcontroller
RD
(According to respective reset
domain SWORST / HWRST)
39
TPS65917-Q1
www.ti.com
SLVSCO4C – JULY 2015 – REVISED MARCH 2017
Submit Documentation Feedback
Product Folder Links: TPS65917-Q1
Detailed Description
Copyright © 2015–2017, Texas Instruments Incorporated
Figure 5-8. Boot Pins Control
5.3.6.1
Boot Pin Usage and Connection
Table 5-6 lists the associated configurations of the boot pins.
Table 5-6. Boot Pins Associated Configurations
BOOT
OTP CONFIGURATION
POWER SEQUENCE SELECTOR
0
OTP5 (0x00~0x2F)
Sel_0
1
OTP5 (0x30~0x5F)
Sel_1
The BOOT pin must be grounded or pulled up.
The status of the BOOT pin is latched at the end of the transition from OFF to ACTIVE mode and stored in
the BOOT_STATUS register.
The BOOT pin can also be used as static selectors during execution of the power sequence. This static
selection provides from within a static power sequence, to branch to different instructions. This static
selection allows the selection of power sequences (or subpart of power sequences) without altering the
power sequences themselves in OTP.


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