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MRF89XA Datasheet(PDF) 13 Page - Microchip Technology |
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MRF89XA Datasheet(HTML) 13 Page - Microchip Technology |
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13 / 140 page  2010-2017 Microchip Technology Inc. Preliminary DS70000622D-page 13 MRF89XA TABLE 2-1: PIN DESCRIPTIONS Pin Number Pin Name Pin Type Description 1 TEST5 Digital I/O Test Pin. Connected to Ground during normal operation. 2 TEST1 Digital I/O Test Pin. Connected to Ground during normal operation. 3 VCORS Analog Output Regulated voltage supply of the VCO (0.85V). 4 VCOTN Analog I/O VCO tank. 5 VCOTP Analog I/O VCO tank. 6 PLLN Analog I/O PLL loop filter. 7 PLLP Analog I/O PLL loop filter. 8 TEST6 Digital I/O Test Pin. Connected to Ground during normal operation. 9 TEST7 Digital I/O Test Pin. Connected to Ground during normal operation. 10 OSC1 Analog Input Crystal connection. 11 OSC2 Analog Input Crystal connection. 12 TEST0 Digital Input Test Pin. Connected to Ground during normal operation. 13 TEST8 Digital I/O Test Pin. Allow pin to float; do not connect signal during normal operation. 14 CSCON Digital Input SPI Configure Chip Select. 15 CSDAT Digital Input SPI Data Chip Select. 16 SDO Digital Output Serial data output interface from MRF89XA. 17 SDI Digital Input Serial data input interface to MRF89XA. 18 SCK Digital Input Serial clock interface. 19 CLKOUT Digital Output Clock output. Output clock at reference frequency divided by a pro- grammable factor. Refer to the Clock Output Control Register (Register 2-28) for more information. 20 DATA Digital I/O NRZ data input and output (Continuous mode). 21 IRQ0 Digital Output Interrupt request output. 22 IRQ1 Digital Output Interrupt request output. 23 PLOCK Digital Output PLL lock detection output. Refer to the FIFO Transmit PLL and RSSI Interrupt Request Configuration Register (Register 2-15) for more information. 24 TEST2 Digital I/O Test Pin. Connected to Ground during normal operation. 25 TEST3 Digital I/O Test Pin. Connected to Ground during normal operation. 26 VDD Power Supply voltage. 27 AVRS Analog Output Regulated supply of the analog circuitry (1.0V). 28 DVRS Analog Output Regulated supply of the digital circuitry (1.0V). 29 PARS Analog Output Regulated supply of the PA (1.8V). 30 TEST4 Digital I/O Test Pin. Connected to Ground during normal operation. 31 RFIO Analog I/O RF input/output (for more information, see Section 2.3, RFIO Pin). 32 NC — No Connection. Connected to Ground during normal operation. 33 Vss Ground Exposed Pad. Connected to Ground during normal operation. |
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