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MRF24XA Datasheet(PDF) 20 Page - Microchip Technology |
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MRF24XA Datasheet(HTML) 20 Page - Microchip Technology |
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20 / 258 page  MRF24XA DS70005023C-page 20 Preliminary 2015 Microchip Technology Inc. REGISTER 2-3: PIR1 (PERIPHERAL INTERRUPT REGISTER 1) Address: 0x04 R/HS-1 R-0 R/HS-0 R/W/HC-0 R-0 R/W/HS-0 R/W/HS-0 R-0 VREGIF r RDYIF IDLEIF r CALSOIF CALHAIF r bit 7 bit 0 Legend: R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ -n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown r = Reserved HC = Hardware Clear HS = Hardware Set bit 7 VREGIF: Voltage Regulator On Interrupt Flag bit This is a nonpersistent bit. The register bit initializes to one on 1.2V reset except for PINRESET and only clears when reading PIR1. Note that the corresponding IE bit is not implemented(1). bit 6 Reserved: Maintain as ‘0’ bit 5 RDYIF: Ready State Interrupt Flag bit Set each time when ready state is reached: • when Calibration ended (CALST = 0) • when initialization ended (INITDONESF = 1) • when crystal is ramped up (XTALSF = 1) This bit is cleared when PIR1 is read. bit 4 IDLEIF: Idle State Interrupt Flag bit Set each time the IDLESF is set and if MCU did not trigger this change. This is unchanged when MCU aborts an action by clearing either of TXST, TXENC, RXDEC or EDST bits. This bit is cleared when PIR1 is read. bit 3 Reserved: Maintain as ‘0’ bit 2 CALSOIF: Calibration Soft Interrupt Flag bit CALSOIF = 1 indicates that Calibration is needed (CALST) although the radio is still functional. It also warns of a possible degradation in signal quality and consumption, and a risk of CALHAIF interrupt. This bit is cleared when PIR1 is read. bit 1 CALHAIF: Calibration Hard Interrupt Flag bit CALHAIF = 1 indicates that immediate Calibration (CALST) is mandatory, otherwise the radio is not functional. The device enters into malfunction state. This bit is cleared when PIR1 is read. bit 0 Reserved: Maintain as ‘0’ Note 1: Generated non-maskable interrupt is gated off until the 1.2V reset is released. |
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