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AMIC120BZDNA30 Datasheet(PDF) 40 Page - Texas Instruments |
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AMIC120BZDNA30 Datasheet(HTML) 40 Page - Texas Instruments |
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40 / 239 page  Copyright © 2017, Texas Instruments Incorporated Terminal Configuration and Functions Submit Documentation Feedback Product Folder Links: AMIC120 40 AMIC120 SPRSP09 – DECEMBER 2017 www.ti.com Table 4-10. Pin Attributes (ZDN Package) (continued) BALL NUMBER [1] PIN NAME [2] SIGNAL NAME [3] MODE [4] TYPE [5] BALL RESET STATE [6] BALL RESET REL. STATE [7] BALL RESET REL. MODE [8] POWER [9] HYS [10] BUFFER STRENGTH (mA) [11] PULL UP/DOWN TYPE [12] IO CELL [13] B4 gpmc_a9 gpmc_a9 0x0 O PD PD Mode7 VDDSHV11 Yes 6 PU/PD LVCMOS gmii2_rxd2 0x1 I rgmii2_rd2 0x2 I mmc2_dat7 0x3 IO gpmc_a25 0x4 O pr1_mii1_rxd2 0x5 I mcasp0_fsx 0x6 IO gpio1_25 0x7 IO rmii2_crs_dv 0x8 I G8 gpmc_a10 gpmc_a10 0x0 O PD PD Mode7 VDDSHV11 Yes 6 PU/PD LVCMOS gmii2_rxd1 0x1 I rgmii2_rd1 0x2 I rmii2_rxd1 0x3 I gpmc_a26 0x4 O pr1_mii1_rxd1 0x5 I mcasp0_axr0 0x6 IO gpio1_26 0x7 IO D8 gpmc_a11 gpmc_a11 0x0 O PD PD Mode7 VDDSHV11 Yes 6 PU/PD LVCMOS gmii2_rxd0 0x1 I rgmii2_rd0 0x2 I rmii2_rxd0 0x3 I gpmc_a27 0x4 O pr1_mii1_rxd0 0x5 I mcasp0_axr1 0x6 IO gpio1_27 0x7 IO B5 gpmc_ad0 gpmc_ad0 0x0 IO PD PD Mode7 VDDSHV10 Yes 6 PU/PD LVCMOS mmc1_dat0 0x1 IO gpio1_0 0x7 IO A5 gpmc_ad1 gpmc_ad1 0x0 IO PD PD Mode7 VDDSHV10 Yes 6 PU/PD LVCMOS mmc1_dat1 0x1 IO gpio1_1 0x7 IO B6 gpmc_ad2 gpmc_ad2 0x0 IO PD PD Mode7 VDDSHV10 Yes 6 PU/PD LVCMOS mmc1_dat2 0x1 IO gpio1_2 0x7 IO A6 gpmc_ad3 gpmc_ad3 0x0 IO PD PD Mode7 VDDSHV10 Yes 6 PU/PD LVCMOS mmc1_dat3 0x1 IO gpio1_3 0x7 IO |
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