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ATBTLC1000XR Datasheet(PDF) 30 Page - Microchip Technology |
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ATBTLC1000XR Datasheet(HTML) 30 Page - Microchip Technology |
30 / 78 page 8.3.2 UART hardware flow control pin selection These bits determine the LP_GPIO pins to be used as the hardware flow control pins(RTS and CTS) of the UART interface with host MCU. For both ATBTLC1000-XR1100A and ATBTLC1000-ZR110CA, these bits will have a default value of 0b10. Find below the possible values for this bits and the corresponding configuration. Table 8-2. UART Flow control Bank 5 Block 3 UART Flow control Bank 5 Block 3[28:27] UART RTS UART CTS 0b10 LP_GPIO_9 LP_GPIO_8 0b11 LP_GPIO_5 LP_GPIO_4 Note: Other values for this bits are reserved 8.3.3 BT Address These bits contain the BT address which could be used by the user application. For ATBTLC1000- ZR110CA modules, BT address will be pre-programmed. For ATBTLC1000-XR1100A, user must purchase the MAC address from IEEE and store in the non-volatile memory section of the host MCU. During initialization of the ATBTLC1000-XR1100A, the BLE address could be set by the host MCU. Refer to API User manual available in the BluSDK release package for more details on acheiving this. ATBTLC1000XR/ZR © 2017 Microchip Technology Inc. Datasheet Complete DS60001505A-page 30 |
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