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ADS7142 Datasheet(PDF) 9 Page - Texas Instruments |
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ADS7142 Datasheet(HTML) 9 Page - Texas Instruments |
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9 / 74 page  9 ADS7142 www.ti.com SBAS773A – SEPTEMBER 2017 – REVISED DECEMBER 2017 Product Folder Links: ADS7142 Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated Timing Requirements (continued) At TA = -40°C to 125°C, AVDD = 3V, DVDD = 1.65 to 3.6V, All Channel Configurations, unless otherwise noted. (1) PARAMETER Test Conditions MIN MAX UNIT tSU-DAT data setup time 10 ns tSU-STO setup-up time for STOP condition 160 ns Cb capacitive load on each line 400 pF High Speed mode (3.4 MHz) Cb = 100 pF (Max) Figure 2 fSCLH SCLH clock frequency 0 3.4 MHz tHD-STA Hold time (repeated) START condition 160 ns tLOW Low period of SCL 160 ns tHIGH High period of SCL 60 ns tSU-STA set-up time for a repeated start condition 160 ns tHD-DAT data hold time 0 70 ns tSU-DAT data setup time 10 ns tSU-STO setup-up time for STOP condition 160 ns Cb capacitive load on each line 100 pF (1) All values referred to VIH(min) ( 0.7 DVDD ) and VIL(max) ( 0.3 DVDD ) (2) tVD-DAT = time for data signal from SCL LOW to SDA output. (3) Input filters on the SDA and SCL inputs suppress noise spikes of less than 50 ns. 6.10 Switching Characteristics At TA = -40°C to 125°C, AVDD = 3V, DVDD = 1.65 to 3.6V, All Channel Configurations, unless otherwise noted. (1) PARAMETER Test Conditions MIN MAX UNIT Standard-mode (100 kHz) Figure 1 trCL Rise time of SCL 1000 ns trDA Rise time of SDA 1000 ns tfCL Fall time of SCL 300 ns tfDA Fall time of SDA 300 ns tVD-DAT (2) data valid time 3.45 µs tVD-ACK (2) data hold time 3.45 µs Fast-mode (400 kHz) Figure 1 trCL Rise time of SCL 20 300 ns trDA Rise time of SDA 20 300 ns tfCL Fall time of SCL 20 × DVDD/3.6 300 ns tfDA Fall time of SDA 20 × DVDD/3.6 300 ns tVD-DAT data valid time 0.9 µs tVD-ACK data hold time 0.9 µs tSP (3) pulse width of spikes suppressed by the input filter 0 50 ns Fast-mode Pus (1000 kHz) Figure 1 trCL Rise time of SCL 120 ns trDA Rise time of SDA 120 ns tfCL Fall time of SCL 20 × DVDD/3.6 120 ns tfDA Fall time of SDA 20 × DVDD/3.6 120 ns tVD-DAT data valid time 0.45 µs tVD-ACK data hold time 0.45 µs tSP pulse width of spikes suppressed by the input filter 0 50 ns High Speed mode (1.7 MHz) Cb = 400 pF (Max) Figure 2 trCL Rise time of SCLH 20 80 ns |
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