Electronic Components Datasheet Search |
|
ADS7047 Datasheet(PDF) 22 Page - Texas Instruments |
|
|
ADS7047 Datasheet(HTML) 22 Page - Texas Instruments |
22 / 42 page First Sample Next Sample tCYCLE 1 2 3 24 0 0 0 Data Output for First Sample tACQ 0 0 4 0 SCLK SDO CS 22 ADS7047 SBAS819 – DECEMBER 2017 www.ti.com Product Folder Links: ADS7047 Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated Device Functional Modes (continued) (1) In addition to the timing specifications of Figure 38 and Table 3, the timing specifications described in Figure 2 and the Timing Requirements table are also applicable for offset calibration on power-up. 8.4.3 OFFCAL State In the offset calibration (OFFCAL) state, the sampling capacitors are disconnected from the analog input pins (AINP and AINM) and the device calibrates and corrects for any internal offset errors. The offset calibration is effective for all subsequent conversions until the device is powered off. An offset calibration cycle is recommended at power-up and whenever there is a significant change in the operating conditions for the device (such as in the AVDD voltage and operating temperature). The host controller must provide a serial transfer frame as described in Figure 38 or in Figure 39 to enter the OFFCAL state. 8.4.3.1 Offset Calibration on Power-Up On power-up, the host must provide 24 SCLKs in the first serial transfer to enter the OFFCAL state. The device provides 0's on SDO during offset calibration. For acquisition of the next sample, a minimum time of tACQ must be provided. If the host controller starts the offset calibration process but then pulls the CS pin high before providing 24 SCLKs, then the offset calibration process is aborted and the device enters the ACQ state. Figure 38 and Table 3 provide the timing for offset calibration on power-up. Figure 38. Timing for Offset Calibration on Power-Up Table 3. Timing Specifications for Offset Calibration on Power-Up(1) MIN TYP MAX UNIT tcycle Cycle time for offset calibration on power-up 24 × tCLK + tACQ ns tACQ Acquisition time 80 ns fSCLK Frequency of SCLK 60 MHz |
Similar Part No. - ADS7047 |
|
Similar Description - ADS7047 |
|
|
Link URL |
Privacy Policy |
ALLDATASHEET.COM |
Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Datasheet Upload | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |