ADS112U04 datasheet(60/72 Pages) TI1

Part #	ADS112U04

Description	16-Bit, 4-Channel, 2-kSPS, Delta-Sigma ADC With UART Interface

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ADS112U04

SBAS838 – JANUARY 2018

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A first-order differential and common-mode RC filter (RF1, RF2, CDIF1, CCM1, and CCM2) is placed on the ADC

inputs. The reference has an additional capacitor CDIF2 to limit reference noise. Care must be taken to maintain a

limited amount of filtering or the measurement is no longer ratiometric.

The device is capable of 16-bit, noise-free resolution using a gain of 128 at 20 SPS for the specified reference

voltage. Accordingly, the device is able to resolve signals as small as one LSB. Use Equation 30 to calculate the

LSB size:

1 LSB = (2 · VREF / Gain) / 2

16 = (2 · 5.0 V / 128) / 216 = 1.192 µV

(30)

To find the total number of counts available for the bridge measurement, the maximum output voltage is divided

by the LSB value. Dividing 10 mV by 1.192 µV equates to 8389 total counts available, which meets the design

parameter of 8000 counts.

Table 29 shows the register settings for this design.

Table 29. Register Settings

REGISTER

SETTING

DESCRIPTION

00h

4Eh

AINP = AIN1, AINN = AIN2, gain = 128, PGA enabled

01h

0Ah

DR = 20 SPS, normal mode, continuous conversion mode, external

reference

02h

98h

Conversion data counter disabled, data integrity disabled, burnout

current sources disabled, IDACs off

03h

00h

No IDACs used, manual data read mode

04h

48h

GPIO2/DRDY pin configured as a DRDY output

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